ESD Design and Analysis Handbook by James E. Vinson Ph.D., Joseph C. Bernier, Gregg D. Croft,

By James E. Vinson Ph.D., Joseph C. Bernier, Gregg D. Croft, Juin J. Liou Ph.D. (auth.)

ESD layout and research Handbook provides an outline of ESD because it results digital circuits and offers a concise advent for college students, engineers, circuit designers and failure analysts. This instruction manual is written basically and is full of functional recommendation and examples to demonstrate the suggestions offered.
While this therapy isn't exhaustive, it provides a few of the most crucial parts of the ESD challenge and indicates equipment for bettering them. the main issues lined comprise the physics of the development, failure research, defense, characterization, and simulation strategies. The publication is meant as either an introductory textual content on ESD and an invaluable reference software to attract on because the reader earnings adventure. The authors have attempted to stability the extent of aspect within the ESD layout and research Handbook opposed to the wealth of literature released on ESD each year. consequently, every one bankruptcy has a topical checklist of references to facilitate extra in-depth study.

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Extra info for ESD Design and Analysis Handbook

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The definition of a failure is an important parameter to determine the threshold level. A looser criterion for a failure produces higher ESD thresholds than more stringent criteria. It is imperative to have a clear and definitive definition for what is and is not a failure otherwise damaged parts may be considered good. During manufacturing it is also imperative to have a clear definition of failure to prevent damaged parts from being considered good. As an example, a loose criterion on supply current allowed damaged parts to start life testing.

One way to improve latchup is to use thin epitaxial material. The thinner material reduces the ability of the parasitic SCR to trigger on. The problem from an ESD perspective is this process improvement also may degrade the ESD performance. The thinner epitaxial silicon may degrade the snapback performance of the MOSFETs used as protection elements. A cross section of a MOSFET is shown in Figure 1-23. The parasitic bipolar transistor is formed from the drain, epi, and source. The drain forms the collector, the epi forms the base, and the source forms the emitter.

It is imperative to have a clear and definitive definition for what is and is not a failure otherwise damaged parts may be considered good. During manufacturing it is also imperative to have a clear definition of failure to prevent damaged parts from being considered good. As an example, a loose criterion on supply current allowed damaged parts to start life testing. A digital part failed life testing because of supply current leakage and functional failure. The leakage current was greater than SmA.

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