High-Performance AD and DA Converters, IC Design in Scaled by Pieter Harpe, Andrea Baschirotto, Kofi A. A. Makinwa

By Pieter Harpe, Andrea Baschirotto, Kofi A. A. Makinwa

This booklet relies at the 18 tutorials offered throughout the twenty third workshop on Advances in Analog Circuit layout. professional designers current readers with information regarding a number of issues on the frontier of analog circuit layout, serving as a precious connection with the state of the art, for an individual curious about analog circuit examine and development.

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8, pp. 1736–1748, Aug. 2011. 6. -D. 22 mm2 10b 204MS/s pipelined SAR ADC in 65 nm CMOS’’, in 2010 IEEE Proc. CICC, pp. 1–4, 2010. 7. C. C. Lee and M. P. Flynn, ‘‘A SAR-Assisted Two-Stage Pipeline ADC’’, IEEE Journal of Solid-State Circuits, vol. 46, n. 4, pp. 859–869, April 2011. 8. Y. , ‘‘A 50-fJ 10-b 160-MS/s Pipelined-SAR ADC Decoupled Flip-Around MDAC and Self-Embedded Offset Cancellation’’, IEEE Journal of Solid-State Circuits, vol. 47, n. 11, pp. 2614–2626, Nov. 2012. 9. B. Verbruggen, M.

75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS,’’ IEEE JSSC, Vol. 44, No. 3, March 2009, pp. 874–882 13. -S. Shu, ‘‘A 6b 3GS/s 11mW Fully Dynamic Flash ADC in 40 nm CMOS with Reduced Number of Comparators,’’ Symposium on VLSI Circuits, June 2012, pp. 26–27 14. V. -C. 5mW 5GS/s 6b flash ADC with dynamic offset calibration in 32 nm CMOS SOI,’’ Symposium on VLSI Circuits, June 2013, pp. 264–265 15. V. , ‘‘An 820 lW 9b 40MS/s Noise-Tolerant Dynamic-SAR ADC in 90 nm Digital CMOS,’’ IEEE ISSCC 2008 16.

Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies’’, IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2658–2668, Dec. 2006. 15. L. -S. Lee, ‘‘A Zero-Crossing-Based 8-bit 200 MS/s Pipelined ADC’’, IEEE J. Solid-State Circuits, vol. 42, no. 12, pp. 2677–2687, Dec. 2007. 16. J. -S. Lee, ‘‘A Zero-Crossing Based 12b 100MS/s Pipelined ADC with Decision Boundary Gap Estimation Calibration’’, IEEE Proc. VLSI Circuits, pp. 237–238, 2010. 17. J. Kuppambatti and P. R. Kinget, ‘‘A Low-Power Zero-Crossing Pipeline-SAR ADC with On-Chip Dynamically Loaded Pre-Charged Reference’’, IEEE Proc.

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